Memory and Logic Integration for System-in-a-Package

System-in-a-Package (SiP), a generalization of System-ona-Chip (SoC), provides a cost-effective solution for largescale memory and logic integration and an attractive alternative for embedded memory. The key elements of SiP memory/logic integration technology include IO redistribution; solder bumping; and flip chip assembly. Two SiP platforms: Chip-on-Chip technology and ChipLaminate-Chip technology are introduced in this paper. An innovative configurable area-IO memory architecture for System-in-a-Package is presented. A 512K SRAM chip has been designed to verify this approach.